A REVIEW PAPER ON HIGH SPEED ARITHMETIC LOGIC UNIT USING ROMs

Authors

  • Seema Kumawat Jayoti Vidyapeeth Women’s University, Jaipur, Rajasthan, India
  • Indu Jayoti Vidyapeeth Women’s University, Jaipur, Rajasthan, India

Keywords:

Arithmetic and logic, FPGA, VHDL, Xilinx.

Abstract

An ALU, adder and multiplication are the major component which defines the speed of an ALU. This paper deals with the construction of high speed multiplication using VHDL. Scientific application demand high floating performance for such requirement design of fast and efficient of arithmetic logic unit. In this simulation and implementation part, has been tested using Xilinx ISE 6.1i and ModelSim SE 5.5e synthesis tool. The best way to create FPGA and CLPD is via VHDL.

Keywords: Arithmetic and logic, FPGA, VHDL, Xilinx.

Published

2020-07-31

How to Cite

Seema Kumawat, & Indu. (2020). A REVIEW PAPER ON HIGH SPEED ARITHMETIC LOGIC UNIT USING ROMs. International Journal of Innovative Computer Science & Engineering, 7(4). Retrieved from https://ijicse.in/index.php/ijicse/article/view/165

Issue

Vol. 7 No. 4 (2020)

Section

Articles